Getting Started

This walks through the fastest path from a clone to a generated macro, using the SKY130 example config shipped in the repo (examples/130nm.toml).

1. Clone and build

$ git clone https://github.com/JoyenBenitto/macro_gen.git
$ cd macro_gen
$ cargo build

See Prerequisites if the build fails looking for ngspice.

2. Run against the example config

$ ./target/debug/macro_gen --config ./examples/130nm.toml

examples/130nm.toml is a PDK-adapter config for the SKY130 process: it points at the NMOS/PMOS device models, the process corner, and a reference inverter’s starting geometry and sizing-sweep parameters.

3. Find the output

By default, output lands under ./build/:

• ./build/spice/: the final generated SPICE decks.
• ./build/.macro_gen_project/: intermediate files such as characterization decks, sizing-sweep candidates, and CSV reports.

Use --build-dir to point elsewhere; see CLI Reference.

4. Size a design

Build with the circt feature (see CMOS Backend) and run one of the benchmarks:

$ cargo build --release --features circt
$ ./target/release/macro_gen --config benchmarks/c17/c17.toml --emit-verilog --add-buffer

The log walks through every sizing step, and the netlists land under ./build/spice/ and ./build/verilog/.

Next steps

• CMOS Backend for how designs are sized.
• Benchmarks for the benchmark suite and results.
• CLI Reference for all flags.
• Logging to see per-iteration characterization/sizing-sweep detail.
• API Reference for the internal module structure.